[scilab-Users] Scicos Block with Different Output Port Types?

[Simone Mannori]

Hello,

from Scilab 4.1.1 and Scilab 4.1.2 a lot of things are changed inside
Scicos.

I will take a look to your problem and I will post you an answer ASAP.

We are working hard to improve the documentation, with a special
attention to developers:

http://wiki.scilab.org/Developers


M. Simone Mannori - Scilab/Scicos Embedded  Applications

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On Mon, 2008-03-10 at 10:22 +0100, Dirk Reusch wrote:
> Hello everybody,
> 
> I am using Scilab 4.1.2/Scicos 4.2 under Linux.
> 
> I've tried to build a scicos block with two outputs ports.
> The first is of type 1 (double) and the second is of type 3
> (int32).
> 
> Editing a diagram, i.e. connecting these ports with ports of
> other blocks of corresponding types works just fine.
> 
> But, scicos compilation/simulation does not work! The compiler
> "thinks" that the second output port has type 1 and _not_ 3.
> 
> Is that a bug, a limitation, or have I done something wrong?
> 
> I've attached a small example, which should reproduce the
> described behaviour.
> 
> Best Regards,
> 
> Dirk Reusch